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CHAMP-FX2 FPGA Application Accelerator

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The CHAMP-FX2 is Curtiss-Wright's next-generation FPGA-based computing platform. Utilizing a 6U VPX-REDI form factor, the CHAMP-FX2 harnesses the tremendous computing power of two Xilinx Virtex™-5 FPGAs, combined with the high-performance floating-point capabilities of the Freescale 8641D dual-core PowerPC™ processor and the exceptional performance and flexibility of a Serial RapidIO switching fabric to deliver unprecedented computational densities. With multiple large DDR2 SDRAM and fast QDR-II+ SRAM blocks (>13 Gbytes/sec total FPGA memory bandwidth) and several on-board and off-board RocketIO™ serial ports, the two FPGA nodes provide a balanced mix of processing capabilities with memory, inter-FPGA, and off-board bandwidths.

The CHAMP-FX2 may be used in a single-board configuration, or with CHAMP-AV6 or VPX-185 Single Board Computers (SBCs) with a high-speed Serial RapidIO switching fabric to form large, heterogenous multicomputing platforms. All platforms utilize Curtiss-Wright's Continuum Software Architecture (CSA) to insure compatibility and user code commonality across platforms.

The CHAMP-FX2 is supported by the Continuum FXtools design kit. The FXtools design kit includes the complete Continuum Firmware and BSP package for the PowerPC with extensions for CHAMP-FX2 specific functionality, as well as highly-optimized IP blocks for such features as the memory and RocketIO interfaces, control bus, intra-FPGA switching fabric, and so on. These blocks, all designed for optimal performance and qualified across the entire rugged temperature range of the CHAMP-FX2, removes much of the risk associated with FPGA development and can significantly improve a project's time-to-deployment with no performance sacrifice. FXtools also includes a SystemVerilog (IEEE 1800™) based simulation test bench with full bus functional models and scripting support. A high-performance Serial RapidIO Endpoint block is also available.

Features:

  • 6U VPX-REDI
  • Two Xilinx Virtex-5 Platform FPGAs (LX110T, LX220T, or LX330T)
  • 512 Mbytes or 1 GB DDR2 SDRAM per FPGA in two banks (1-2 Gbyte total on-board), 4.4 GBytes/sec peak bandwidth per FPGA 
  • 36 Mbytes QDR-II+ SRAM per FPGA in four banks (72 Mbytes total on-board), 8.8 GBytes/sec peak bandwidth per FPGA
  • 4-lane RocketIO connection between the two FPGAs
  • 1 GHz 8641D dual-core 8641 processor with 512 Mbytes of DDR2 SDRAM in two banks 
  • XMC mezzanine site
  • Ob-board Serial RapidIO switch with 4-lane connectivity to the PowerPC and each FPGA and four 4-lane ports to the backplane
  • Two 4-lane RocketIO ports to the backplane (one for each FPGA).  Four 4-lane ports for the LX330T part.
  • Optional front-panel 4-lane RocketIO port for the LX330T variant.
  • 512 Mbytes Flash for PowerPC or FPGA code or user files 
  • Support for ChipScope Pro and JTAG processor debug interfaces
  • Continuum FXtools developer's kit offers Continuum Firmware and BSP, FX2-specific software libraries, BIT, highly-optimized IP blocks, reference designs, and a scriptable simulation testbench
  • Serial RapidIO Endpoint block available
  • Low and high temperature-qualified IP blocks
  • Continuum IPC middleware and Continuum Vector algorithm libraries available
  • Air-cooled and conduction-cooled versions