VPF2 VXS 8641 & Dual Virtex-5

The VPF2 is a high-performance heterogeneous processing engine coupling a dual PowerPC™ AltiVec™ CPU with two latest generation Xilinx Virtex-5 FPGAs. The combination of devices provides leading edge performance with flexible high-bandwidth I/O. This VXS board is available in both air-cooled and conduction cooled versions, with VxWorks or Linux board support packages. The VPF2 also supports the FusionXF FPGA Design Kit of FPGA HDL blocks for implementing the customer's application.

At its most simple, the VPF2 is a quad processor DSP engine. Two of these processor elements are combined into a single, highly integrated, Freescale MPC8641D CPU. The other two processors are the Xilinx Virtex-5 FPGA devices. It is this hybrid CPU/FPGA combination that makes the VPF2 so powerful through levering the advantages of each technology. The FPGAs also provide the VXS/VITA 41 multi-gigabit serial communications. Both FPGAs are fully user programmable and we provides tools, examples and utilities to simplify code development.

Input/output is provided through a number of channels including copper or fiber Ethernet ports, XMC/PMC for a wide choice of I/O options, RS232 ports or VXS serial I/O for inter-board communications along with a VME64 bus. Direct FPGA I/O is also provided through a parallel port, via the backplane, for high bandwidth I/O.

For system critical applications, Built-In Test (BIT) provides a power up and run-time system diagnostic. To make application development easier, I/O board drivers and optimized libraries are available. The operating systems supported are VxWorks and Linux. The suite of libraries and utilities is known as FusionXF. The FusionXF FPGA design kit provides the BSP and support code for both the PowerPC processors and the Virtex-5 FPGAs. FusionXF contains both an SDK (Software Development Kit) and HDK (HDL Development Kit). This kit provides all the necessary libraries and utilities needed for using the VPF2. Different versions are available for each of the different operation systems.

PowerPC CPU
Device	Freescale Power Architecture MPC8641D
Speed	1.25GHz
Memory	2Gbyte DDR2 SDRAM (inc. ECC)
FLASH	128Mbytes
FPGA Nodes
Device	Xilinx Virtex-5 LX110T or 95SXT (speed grade 2)
Number of FPGAs	2
Memory (per FPGA)	4x 9MB QDR-II SRAM (18-bit data paths at up to 250MHz) 2x 128MB DDR2 SDRAM (16-bit data paths at up to 266MHz) 32MB FLASH (for storing FPGA images only)
Connectivity	x8 PCIe to CPU (per FPGA) 4x RocketIO between FPGAs 4x RocketIO per FPGA for VXS 40 signals between FPGAs (single-ended) VME P2 (user defined I/O - 64 signals)
Clock References	3 sources, 156.25, 125 and 106.25MHz
Configuration	JTAG, MPC8641D and on-board FLASH
Ethernet
Device	Embedded within MPC8641D
Speed	10/100/1000Mbps
Channel A	1000-SX (front panel optical) or 10/100-TX, 1000-T via VME P2 auto select
Channel B	1000-SX (front panel optical) or 10/100-TX, 1000-T (front panel RJ45) Note: this is defined as a build option
Serial I/O
Device	DUART embedded within MPC8641D
Channels	2x RS232 (routed to VME P2)
PCIe
Device	PEX8532
Connectivity	FPGA B (x8) MPC8641D (x8) XMC (x8) PCIe/PCI-X bridge (x4)
VME
Device	Tundra Tsi148
Compliance	2eSST, VME64, master/slave
VXS
Compliance	VITA 41.0, payload
Protocol	FPGA defined
PMC/XMC Site
PCI Compliance	PCI (33/66MHz) PCI-X (66/100/133MHz) 3.3V signalling
XMC (VITA 42)	P15 x8 PCIe channel
Software/HDL Code
Operating System	VxWorks 6.5, Linux 2.6 (DENX Distribution)
Utilities	FLASH programming, diagnostics
Software/HDL Examples	Examples (memory, PCIe, VXS) FusionXF FPGA Design Kit
Misc.
Power	VXS/VME64x 3.3V (TBA W) 5V (TBA W) +12V (TBA W) -12V (TBA W)

 

 

Documents

VPF2 datasheet

Other Links

Ruggedization Levels Product Group Index ADC510 ADC511 ADC512 ADC513 ADX000 FusionXF FPGA Development Kit